/**
 * @file regs.h
 * @brief Hardware register bitfield unions for nRF52840 peripherals.
 *
 * Layout is guaranteed correct only with arm-none-eabi-gcc (LSB-first
 * bitfields).  Bit ranges match nRF52840 Product Specification v1.7.
 */
#pragma once
#include <stdint.h>

/* GPIOTE */

/** @brief GPIOTE CONFIG[n]: channel configuration register. */
typedef union {
    struct {
        uint32_t MODE     : 2;  /* [1:0]   0=Disabled  1=Event  3=Task */
        uint32_t          : 6;  /* [7:2]   reserved */
        uint32_t PSEL     : 5;  /* [12:8]  pin number within port */
        uint32_t PORT     : 1;  /* [13]    0=Port0  1=Port1 */
        uint32_t          : 2;  /* [15:14] reserved */
        uint32_t POLARITY : 2;  /* [17:16] 0=None  1=LoToHi  2=HiToLo  3=Toggle */
        uint32_t          : 2;  /* [19:18] reserved */
        uint32_t OUTINIT  : 1;  /* [20]    initial output value for Task mode */
        uint32_t          : 11; /* [31:21] reserved */
    } bit;
    uint32_t reg;
} gpiote_config_t;

#define GPIOTE_MODE_DISABLED 0u
#define GPIOTE_MODE_EVENT 1u
#define GPIOTE_MODE_TASK 3u
#define GPIOTE_POL_NONE 0u
#define GPIOTE_POL_LOTOHI 1u
#define GPIOTE_POL_HITOLO 2u
#define GPIOTE_POL_TOGGLE 3u

/** @brief GPIOTE INTENSET / INTENCLR: interrupt enable register. */
typedef union {
    struct {
        uint32_t IN0  : 1;  /* [0]    channel 0 input event */
        uint32_t IN1  : 1;  /* [1]    channel 1 input event */
        uint32_t IN2  : 1;  /* [2] */
        uint32_t IN3  : 1;  /* [3] */
        uint32_t IN4  : 1;  /* [4] */
        uint32_t IN5  : 1;  /* [5] */
        uint32_t IN6  : 1;  /* [6] */
        uint32_t IN7  : 1;  /* [7] */
        uint32_t      : 23; /* [30:8]  reserved */
        uint32_t PORT : 1;  /* [31]    PORT event */
    } bit;
    uint32_t reg;
} gpiote_inten_t;

/* RADIO */

/** @brief RADIO FREQUENCY: RF channel selection register. */
typedef union {
    struct {
        uint32_t FREQUENCY : 7;  /* [6:0]  offset from base frequency in MHz */
        uint32_t           : 1;  /* [7]    reserved */
        uint32_t MAP       : 1;  /* [8]    0: base=2400 MHz  1: base=2360 MHz */
        uint32_t           : 23; /* [31:9] reserved */
    } bit;
    uint32_t reg;
} radio_frequency_t;

#define RADIO_MAP_DEFAULT 0u /* channel n -> 2400+n MHz */
#define RADIO_MAP_BLE 1u     /* channel n -> 2360+n MHz */

/** @brief RADIO TXPOWER: transmit power register. */
typedef union {
    struct {
        int32_t TXPOWER : 8; /* [7:0]  signed dBm: +8, +7, +6, +5, +4, +3, +2,
                                        0, -4, -8, -12, -16, -20, -40 */
        uint32_t : 24;       /* [31:8] reserved */
    } bit;
    uint32_t reg;
} radio_txpower_t;

/** @brief RADIO MODE: data rate and modulation register. */
typedef union {
    struct {
        uint32_t MODE : 4;  /* [3:0]  0=NRF_1Mbit  1=NRF_2Mbit  4=BLE_1Mbit ... */
        uint32_t      : 28; /* [31:4] reserved */
    } bit;
    uint32_t reg;
} radio_mode_t;

#define RADIO_MODE_NRF_1MBIT 0u
#define RADIO_MODE_NRF_2MBIT 1u
#define RADIO_MODE_BLE_1MBIT 4u

/** @brief RADIO PCNF0: packet configuration register 0 (header fields). */
typedef union {
    struct {
        uint32_t LFLEN  : 4; /* [3:0]   length of LENGTH field in bits */
        uint32_t        : 4; /* [7:4]   reserved */
        uint32_t S0LEN  : 1; /* [8]     length of S0 field in bytes (0 or 1) */
        uint32_t        : 7; /* [15:9]  reserved */
        uint32_t S1LEN  : 4; /* [19:16] length of S1 field in bits */
        uint32_t S1INCL : 1; /* [20]    include S1 field in RAM even if zero length */
        uint32_t        : 3; /* [23:21] reserved */
        uint32_t PLEN   : 1; /* [24]    0=8-bit preamble  1=16-bit preamble */
        uint32_t        : 6; /* [30:25] reserved */
        uint32_t CRCINC : 1; /* [31]    include CRC in LENGTH field */
    } bit;
    uint32_t reg;
} radio_pcnf0_t;

/** @brief RADIO PCNF1: packet configuration register 1 (payload and address). */
typedef union {
    struct {
        uint32_t MAXLEN  : 8; /* [7:0]   maximum payload length in bytes */
        uint32_t STATLEN : 8; /* [15:8]  static length added to payload */
        uint32_t BALEN   : 3; /* [18:16] base address length (2-4 bytes) */
        uint32_t         : 5; /* [23:19] reserved */
        uint32_t ENDIAN  : 1; /* [24]    0=little-endian  1=big-endian */
        uint32_t WHITEEN : 1; /* [25]    1=enable data whitening */
        uint32_t         : 6; /* [31:26] reserved */
    } bit;
    uint32_t reg;
} radio_pcnf1_t;

/** @brief RADIO CRCCNF: CRC configuration register. */
typedef union {
    struct {
        uint32_t LEN      : 2;  /* [1:0]  0=disabled  1=1 byte  2=2 bytes  3=3 bytes */
        uint32_t          : 6;  /* [7:2]  reserved */
        uint32_t SKIPADDR : 1;  /* [8]    1=skip address field in CRC calculation */
        uint32_t          : 23; /* [31:9] reserved */
    } bit;
    uint32_t reg;
} radio_crccnf_t;

#define RADIO_CRCCNF_LEN_DISABLED 0u
#define RADIO_CRCCNF_LEN_ONE 1u
#define RADIO_CRCCNF_LEN_TWO 2u
#define RADIO_CRCCNF_LEN_THREE 3u

/** @brief RADIO SHORTS: hardware shortcut register. */
typedef union {
    struct {
        uint32_t READY_START       : 1;  /* [0]  READY -> TASKS_START */
        uint32_t END_DISABLE       : 1;  /* [1]  END   -> TASKS_DISABLE */
        uint32_t DISABLED_TXEN     : 1;  /* [2]  DISABLED -> TASKS_TXEN */
        uint32_t DISABLED_RXEN     : 1;  /* [3]  DISABLED -> TASKS_RXEN */
        uint32_t ADDRESS_RSSISTART : 1;  /* [4]  ADDRESS  -> TASKS_RSSISTART */
        uint32_t END_START         : 1;  /* [5]  END      -> TASKS_START */
        uint32_t ADDRESS_BCSTART   : 1;  /* [6]  ADDRESS  -> TASKS_BCSTART */
        uint32_t                   : 1;  /* [7]  reserved */
        uint32_t DISABLED_RSSISTOP : 1;  /* [8]  DISABLED -> TASKS_RSSISTOP */
        uint32_t                   : 23; /* [31:9] reserved */
    } bit;
    uint32_t reg;
} radio_shorts_t;